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NXP claims world’s first no-offset I2C-bus buffers

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These bus buffers use the no-offset scoreboard method to decide signal direction, rather than using a directional pin and relying on offset voltages to control direction and prevent bus latch-up. Significantly, the no-offset devices are interoperable even with static offset or incremental bus buffers, allowing easy design-in regardless of which other devices are on the bus.In addition, NXP has introduced the PCA9646 – the industry’s first fully buffered 4-channel switch with no-offset ports. All devices work to 1 MHz, and the PCA9605 and PCA9646 support Fast-mode Plus (Fm+), which has 10x the normal I2C-bus drive, allowing longer I2C-buses or placement of more devices on the bus.While I2C buses have traditionally been used in computing, consumer and portable applications where only short bus lengths are needed, the new Fm+ no-offset bus buffers and switch from NXP overcome this limitation by allowing buses to be broken into segments or branches to isolate the bus capacitance into lower capacitive segments meeting I2C-bus specifications.”Simple, fast and flexible, NXP I²C technology has been at the heart of server computing designs since we first invented the I²C bus over 30 years ago. By enabling designers to drive robust I²C-bus signals over long distances through interconnects in electrically noisy environments, our no-offset bus buffers and switch open up exciting new possibilities for the I²C bus in enterprise computing, industrial automation and automotive applications,” said Steve Blozis, international product marketing manager, Interface business line, NXP Semiconductors. Availability and PricingThe PCA9525, PCA9605 and PCA9646 are all available immediately via distributors in SO and TSSOP package options. Pricing varies by product and volume; the PCA9525D is available at US $0.76 per 1K units.


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